mirror of https://github.com/YosysHQ/yosys.git
Disable boxing of ECP5 dist RAM due to regression
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@ -104,7 +104,7 @@ module PFUMX (input ALUT, BLUT, C0, output Z);
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endmodule
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endmodule
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// ---------------------------------------
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// ---------------------------------------
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(* abc_box_id=2, abc_scc_break="DI,WAD,WRE" *)
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//(* abc_box_id=2, abc_scc_break="DI,WAD,WRE" *)
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module TRELLIS_DPR16X4 (
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module TRELLIS_DPR16X4 (
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input [3:0] DI,
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input [3:0] DI,
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input [3:0] WAD,
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input [3:0] WAD,
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