mirror of https://github.com/YosysHQ/yosys.git
wrapcell: Add comments, const qualifier
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@ -48,7 +48,7 @@ struct ContextData {
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};
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std::optional<std::string> format(std::string fmt, const dict<IdString, Const> ¶meters,
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ContextData &context)
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const ContextData &context)
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{
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std::stringstream result;
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@ -108,6 +108,7 @@ struct Chunk {
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}
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};
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// Joins contiguous runs of bits into a 'Chunk'
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std::vector<Chunk> collect_chunks(std::vector<std::pair<IdString, int>> bits)
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{
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std::vector<Chunk> ret;
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@ -242,6 +243,7 @@ struct WrapcellPass : Pass {
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subcell = subm->addCell("$1", cell->type);
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for (auto conn : cell->connections()) {
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if (ct.cell_output(cell->type, conn.first)) {
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// Insert marker bits as placehodlers which need to be replaced
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subcell->setPort(conn.first, SigSpec(RTLIL::Sm, conn.second.size()));
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} else {
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Wire *w = subm->addWire(conn.first, conn.second.size());
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