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rtlil: Add `Design::select()` for selecting whole modules.
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@ -1061,6 +1061,13 @@ struct RTLIL::Design
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return selected_member(module->name, member->name);
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}
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template<typename T1> void select(T1 *module) {
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if (selection_stack.size() > 0) {
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RTLIL::Selection &sel = selection_stack.back();
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sel.select(module);
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}
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}
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template<typename T1, typename T2> void select(T1 *module, T2 *member) {
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if (selection_stack.size() > 0) {
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RTLIL::Selection &sel = selection_stack.back();
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