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Merge pull request #1445 from YosysHQ/mwk/xilinx_ibufg
xilinx: Add simulation model for IBUFG.
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commit
3c6a566d86
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@ -38,6 +38,17 @@ module IBUF(
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assign O = I;
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assign O = I;
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endmodule
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endmodule
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module IBUFG(
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output O,
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(* iopad_external_pin *)
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input I);
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parameter CAPACITANCE = "DONT_CARE";
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parameter IBUF_DELAY_VALUE = "0";
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parameter IBUF_LOW_PWR = "TRUE";
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parameter IOSTANDARD = "DEFAULT";
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assign O = I;
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endmodule
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module OBUF(
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module OBUF(
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(* iopad_external_pin *)
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(* iopad_external_pin *)
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output O,
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output O,
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@ -53,7 +53,7 @@ XC6S_CELLS = [
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# Cell('IBUF', port_attrs={'I': ['iopad_external_pin']}),
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# Cell('IBUF', port_attrs={'I': ['iopad_external_pin']}),
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Cell('IBUFDS', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS_DIFF_OUT', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS_DIFF_OUT', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFG', port_attrs={'I': ['iopad_external_pin']}),
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# Cell('IBUFG', port_attrs={'I': ['iopad_external_pin']}),
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Cell('IBUFGDS', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFGDS', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFGDS_DIFF_OUT', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFGDS_DIFF_OUT', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IOBUF', port_attrs={'IO': ['iopad_external_pin']}),
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Cell('IOBUF', port_attrs={'IO': ['iopad_external_pin']}),
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@ -174,7 +174,7 @@ XC6V_CELLS = [
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Cell('IBUFDS', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS_DIFF_OUT', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS_DIFF_OUT', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS_GTHE1', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS_GTHE1', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFG', port_attrs={'I': ['iopad_external_pin']}),
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# Cell('IBUFG', port_attrs={'I': ['iopad_external_pin']}),
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Cell('IBUFGDS', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFGDS', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFGDS_DIFF_OUT', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFGDS_DIFF_OUT', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IDELAYCTRL', keep=True, port_attrs={'REFCLK': ['clkbuf_sink']}),
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Cell('IDELAYCTRL', keep=True, port_attrs={'REFCLK': ['clkbuf_sink']}),
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@ -307,7 +307,7 @@ XC7_CELLS = [
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Cell('IBUFDS_GTE2', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS_GTE2', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS_IBUFDISABLE', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS_IBUFDISABLE', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS_INTERMDISABLE', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFDS_INTERMDISABLE', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFG', port_attrs={'I': ['iopad_external_pin']}),
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# Cell('IBUFG', port_attrs={'I': ['iopad_external_pin']}),
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Cell('IBUFGDS', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFGDS', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFGDS_DIFF_OUT', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IBUFGDS_DIFF_OUT', port_attrs={'I': ['iopad_external_pin'], 'IB': ['iopad_external_pin']}),
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Cell('IDELAYCTRL', keep=True, port_attrs={'REFCLK': ['clkbuf_sink']}),
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Cell('IDELAYCTRL', keep=True, port_attrs={'REFCLK': ['clkbuf_sink']}),
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@ -1282,16 +1282,6 @@ module IBUFDS_DIFF_OUT (...);
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input IB;
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input IB;
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endmodule
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endmodule
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module IBUFG (...);
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parameter CAPACITANCE = "DONT_CARE";
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parameter IBUF_DELAY_VALUE = "0";
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parameter IBUF_LOW_PWR = "TRUE";
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parameter IOSTANDARD = "DEFAULT";
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output O;
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(* iopad_external_pin *)
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input I;
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endmodule
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module IBUFGDS (...);
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module IBUFGDS (...);
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parameter CAPACITANCE = "DONT_CARE";
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parameter CAPACITANCE = "DONT_CARE";
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parameter DIFF_TERM = "FALSE";
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parameter DIFF_TERM = "FALSE";
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@ -1821,16 +1821,6 @@ module IBUFDS_GTHE1 (...);
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input IB;
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input IB;
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endmodule
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endmodule
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module IBUFG (...);
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parameter CAPACITANCE = "DONT_CARE";
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parameter IBUF_DELAY_VALUE = "0";
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parameter IBUF_LOW_PWR = "TRUE";
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parameter IOSTANDARD = "DEFAULT";
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output O;
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(* iopad_external_pin *)
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input I;
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endmodule
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module IBUFGDS (...);
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module IBUFGDS (...);
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parameter CAPACITANCE = "DONT_CARE";
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parameter CAPACITANCE = "DONT_CARE";
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parameter DIFF_TERM = "FALSE";
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parameter DIFF_TERM = "FALSE";
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@ -3932,16 +3932,6 @@ module IBUFDS_INTERMDISABLE (...);
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input INTERMDISABLE;
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input INTERMDISABLE;
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endmodule
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endmodule
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module IBUFG (...);
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parameter CAPACITANCE = "DONT_CARE";
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parameter IBUF_DELAY_VALUE = "0";
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parameter IBUF_LOW_PWR = "TRUE";
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parameter IOSTANDARD = "DEFAULT";
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output O;
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(* iopad_external_pin *)
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input I;
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endmodule
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module IBUFGDS (...);
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module IBUFGDS (...);
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parameter CAPACITANCE = "DONT_CARE";
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parameter CAPACITANCE = "DONT_CARE";
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parameter DIFF_TERM = "FALSE";
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parameter DIFF_TERM = "FALSE";
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