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greenpak4: Added GP_DFFxI cells

This commit is contained in:
Andrew Zonenberg 2016-08-14 00:11:44 -07:00
parent 2b062c48cb
commit 3b9756c6a3
2 changed files with 68 additions and 0 deletions
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26
techlibs/greenpak4/cells_map.v
View File

@ -24,6 +24,32 @@ module GP_DFFR(input D, CLK, nRST, output reg Q);
);
endmodule
module GP_DFFSI(input D, CLK, nSET, output reg Q);
parameter [0:0] INIT = 1'bx;
GP_DFFSRI #(
.INIT(INIT),
.SRMODE(1'b1),
) _TECHMAP_REPLACE_ (
.D(D),
.CLK(CLK),
.nSR(nSET),
.Q(Q)
);
endmodule
module GP_DFFRI(input D, CLK, nRST, output reg Q);
parameter [0:0] INIT = 1'bx;
GP_DFFSRI #(
.INIT(INIT),
.SRMODE(1'b0),
) _TECHMAP_REPLACE_ (
.D(D),
.CLK(CLK),
.nSR(nRST),
.Q(Q)
);
endmodule
module GP_OBUFT(input IN, input OE, output OUT);
GP_IOBUF _TECHMAP_REPLACE_ (
.IN(IN),

42
techlibs/greenpak4/cells_sim.v
View File

@ -165,6 +165,14 @@ module GP_DFF(input D, CLK, output reg Q);
end
endmodule
module GP_DFFI(input D, CLK, output reg Q);
parameter [0:0] INIT = 1'bx;
initial Q = INIT;
always @(posedge CLK) begin
Q <= ~D;
end
endmodule
module GP_DFFR(input D, CLK, nRST, output reg Q);
parameter [0:0] INIT = 1'bx;
initial Q = INIT;
@ -176,6 +184,17 @@ module GP_DFFR(input D, CLK, nRST, output reg Q);
end
endmodule
module GP_DFFRI(input D, CLK, nRST, output reg Q);
parameter [0:0] INIT = 1'bx;
initial Q = INIT;
always @(posedge CLK, negedge nRST) begin
if (!nRST)
Q <= 1'b1;
else
Q <= ~D;
end
endmodule
module GP_DFFS(input D, CLK, nSET, output reg Q);
parameter [0:0] INIT = 1'bx;
initial Q = INIT;
@ -187,6 +206,17 @@ module GP_DFFS(input D, CLK, nSET, output reg Q);
end
endmodule
module GP_DFFSI(input D, CLK, nSET, output reg Q);
parameter [0:0] INIT = 1'bx;
initial Q = INIT;
always @(posedge CLK, negedge nSET) begin
if (!nSET)
Q <= 1'b0;
else
Q <= ~D;
end
endmodule
module GP_DFFSR(input D, CLK, nSR, output reg Q);
parameter [0:0] INIT = 1'bx;
parameter [0:0] SRMODE = 1'bx;
@ -199,6 +229,18 @@ module GP_DFFSR(input D, CLK, nSR, output reg Q);
end
endmodule
module GP_DFFSRI(input D, CLK, nSR, output reg Q);
parameter [0:0] INIT = 1'bx;
parameter [0:0] SRMODE = 1'bx;
initial Q = INIT;
always @(posedge CLK, negedge nSR) begin
if (!nSR)
Q <= ~SRMODE;
else
Q <= ~D;
end
endmodule
module GP_IBUF(input IN, output OUT);
assign OUT = IN;
endmodule