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intel_alm: fix typo in MISTRAL_MUL27X27 cell name

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Dan Ravensloft 2020-08-13 15:30:03 +01:00 committed by Marcelina Kościelnicka
parent f61d62a7bc
commit 3b534a203a
1 changed files with 1 additions and 1 deletions
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2
techlibs/intel_alm/common/dsp_sim.v
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@ -1,5 +1,5 @@
(* abc9_box *)
module MISTRAL_MUL27x27(input [26:0] A, input [26:0] B, output [53:0] Y);
module MISTRAL_MUL27X27(input [26:0] A, input [26:0] B, output [53:0] Y);
// TODO: Cyclone 10 GX timings; the below are for Cyclone V
specify