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Move `techmap abc_map.v` into map_luts

This commit is contained in:
Eddie Hung 2019-08-20 17:55:12 -07:00
parent 54284aaa98
commit 3b52d6e29c
1 changed files with 2 additions and 1 deletions
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3
techlibs/xilinx/synth_xilinx.cc
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@ -380,7 +380,7 @@ struct SynthXilinxPass : public ScriptPass
if (widemux > 0) if (widemux > 0)
techmap_args += stringf(" -D MIN_MUX_INPUTS=%d", widemux); techmap_args += stringf(" -D MIN_MUX_INPUTS=%d", widemux);
if (abc9) if (abc9)
techmap_args += " -map +/xilinx/ff_map.v -map +/xilinx/abc_map.v"; techmap_args += " -map +/xilinx/ff_map.v";
run("techmap " + techmap_args); run("techmap " + techmap_args);
run("clean"); run("clean");
} }
@ -393,6 +393,7 @@ struct SynthXilinxPass : public ScriptPass
if (family != "xc7") if (family != "xc7")
log_warning("'synth_xilinx -abc9' currently supports '-family xc7' only.\n"); log_warning("'synth_xilinx -abc9' currently supports '-family xc7' only.\n");
run("read_verilog -icells -lib +/xilinx/abc_model.v"); run("read_verilog -icells -lib +/xilinx/abc_model.v");
run("techmap -map +/xilinx/abc_map.v";
if (nowidelut) if (nowidelut)
run("abc9 -lut +/xilinx/abc_xc7_nowide.lut -box +/xilinx/abc_xc7.box -W " + std::to_string(XC7_WIRE_DELAY)); run("abc9 -lut +/xilinx/abc_xc7_nowide.lut -box +/xilinx/abc_xc7.box -W " + std::to_string(XC7_WIRE_DELAY));
else else