mirror of https://github.com/YosysHQ/yosys.git
Call memory_dff before DSP mapping to reserve registers (fixes #1447)
This commit is contained in:
parent
0d037bf9d8
commit
3b405d985e
|
@ -273,6 +273,7 @@ struct SynthIce40Pass : public ScriptPass
|
|||
run("opt_expr");
|
||||
run("opt_clean");
|
||||
if (help_mode || dsp) {
|
||||
run("memory_dff");
|
||||
run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 "
|
||||
"-D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 "
|
||||
"-D DSP_NAME=$__MUL16X16", "(if -dsp)");
|
||||
|
|
|
@ -341,6 +341,7 @@ struct SynthXilinxPass : public ScriptPass
|
|||
|
||||
if (check_label("map_dsp", "(skip if '-nodsp')")) {
|
||||
if (!nodsp || help_mode) {
|
||||
run("memory_dff"); // xilinx_dsp will merge registers, reserve memory port registers first
|
||||
// NB: Xilinx multipliers are signed only
|
||||
run("techmap -map +/mul2dsp.v -map +/xilinx/dsp_map.v -D DSP_A_MAXWIDTH=25 "
|
||||
"-D DSP_A_MAXWIDTH_PARTIAL=18 -D DSP_B_MAXWIDTH=18 " // Partial multipliers are intentionally
|
||||
|
|
Loading…
Reference in New Issue