mirror of https://github.com/YosysHQ/yosys.git
stat: allow gzipped liberty files
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parent
a72074777a
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3afbd48f61
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@ -23,6 +23,7 @@
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#include "kernel/celltypes.h"
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#include "passes/techmap/libparse.h"
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#include "kernel/cost.h"
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#include "kernel/gzip.h"
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#include "libs/json11/json11.hpp"
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USING_YOSYS_NAMESPACE
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@ -347,13 +348,12 @@ statdata_t hierarchy_worker(std::map<RTLIL::IdString, statdata_t> &mod_stat, RTL
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void read_liberty_cellarea(dict<IdString, cell_area_t> &cell_area, string liberty_file)
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{
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std::ifstream f;
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f.open(liberty_file.c_str());
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std::istream* f = uncompressed(liberty_file.c_str());
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yosys_input_files.insert(liberty_file);
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if (f.fail())
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if (f->fail())
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log_cmd_error("Can't open liberty file `%s': %s\n", liberty_file.c_str(), strerror(errno));
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LibertyParser libparser(f);
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f.close();
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LibertyParser libparser(*f);
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delete f;
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for (auto cell : libparser.ast->children)
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{
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@ -0,0 +1,14 @@
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read_rtlil << EOF
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module \top
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wire input 1 \A
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wire output 2 \Y
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cell \sg13g2_and2_1 \sub
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connect \A \A
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connect \B 1'0
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connect \Y \Y
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end
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end
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EOF
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logger -expect log "Chip area for module '\\top': 9.072000" 1
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logger -expect-no-warnings
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stat -liberty ../../tests/liberty/foundry_data/sg13g2_stdcell_typ_1p20V_25C.lib.filtered.gz
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