mirror of https://github.com/YosysHQ/yosys.git
AIM file could have gaps in or between inputs and inits
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parent
c785cb7fe3
commit
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@ -1798,6 +1798,7 @@ struct AIWWriter : public OutputWriter
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std::ifstream mf(worker->map_filename);
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std::ifstream mf(worker->map_filename);
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std::string type, symbol;
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std::string type, symbol;
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int variable, index;
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int variable, index;
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int max_input = 0;
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if (mf.fail())
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if (mf.fail())
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log_cmd_error("Not able to read AIGER witness map file.\n");
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log_cmd_error("Not able to read AIGER witness map file.\n");
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while (mf >> type >> variable >> index >> symbol) {
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while (mf >> type >> variable >> index >> symbol) {
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@ -1815,8 +1816,10 @@ struct AIWWriter : public OutputWriter
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if (worker->clockn.count(escaped_s)) {
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if (worker->clockn.count(escaped_s)) {
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clocks[variable] = false;
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clocks[variable] = false;
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}
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}
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max_input = max(max_input,variable);
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} else if (type == "init") {
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} else if (type == "init") {
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aiw_inits[variable] = SigBit(w,index-w->start_offset);
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aiw_inits[variable] = SigBit(w,index-w->start_offset);
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max_input = max(max_input,variable);
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} else if (type == "latch") {
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} else if (type == "latch") {
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aiw_latches[variable] = {SigBit(w,index-w->start_offset), false};
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aiw_latches[variable] = {SigBit(w,index-w->start_offset), false};
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} else if (type == "invlatch") {
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} else if (type == "invlatch") {
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@ -1863,7 +1866,7 @@ struct AIWWriter : public OutputWriter
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}
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}
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if (skip)
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if (skip)
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continue;
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continue;
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for (int i = 0;; i++)
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for (int i = 0; i <= max_input; i++)
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{
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{
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if (aiw_inputs.count(i)) {
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if (aiw_inputs.count(i)) {
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SigBit bit = aiw_inputs.at(i);
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SigBit bit = aiw_inputs.at(i);
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@ -1883,9 +1886,9 @@ struct AIWWriter : public OutputWriter
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aiwfile << '0';
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aiwfile << '0';
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continue;
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continue;
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}
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}
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aiwfile << '\n';
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aiwfile << '0';
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break;
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}
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}
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aiwfile << '\n';
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}
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}
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}
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}
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