abstract: -state refactor sigbit rep pool collection

This commit is contained in:
Emil J. Tywoniak 2025-02-10 12:01:26 +01:00
parent bfb20147b7
commit 355f5e3740
1 changed files with 9 additions and 4 deletions

View File

@ -43,10 +43,7 @@ bool abstract_state_port(FfData& ff, SigSpec& port_sig, std::set<int> offsets, E
return true;
}
unsigned int abstract_state(Module* mod, EnableLogic enable) {
CellTypes ct;
ct.setup_internals_ff();
SigMap sigmap(mod);
pool<SigBit> gather_selected_reps(Module* mod, SigMap& sigmap) {
pool<SigBit> selected_representatives;
// Collect reps for all wire bits of selected wires
@ -60,6 +57,14 @@ unsigned int abstract_state(Module* mod, EnableLogic enable) {
if (cell->output(conn.first))
for (auto bit : conn.second.bits())
selected_representatives.insert(sigmap(bit));
return selected_representatives;
}
unsigned int abstract_state(Module* mod, EnableLogic enable) {
CellTypes ct;
ct.setup_internals_ff();
SigMap sigmap(mod);
pool<SigBit> selected_representatives = gather_selected_reps(mod, sigmap);
unsigned int changed = 0;
std::vector<FfData> ffs;