mirror of https://github.com/YosysHQ/yosys.git
Added SystemVerilog support for ++ and --
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@ -366,7 +366,9 @@ import[ \t\r\n]+\"(DPI|DPI-C)\"[ \t\r\n]+function[ \t\r\n]+ {
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"<<<" { return OP_SSHL; }
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">>>" { return OP_SSHR; }
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"::" { SV_KEYWORD(TOK_PACKAGESEP); }
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"::" { return TOK_PACKAGESEP; }
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"++" { return TOK_INCREMENT; }
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"--" { return TOK_DECREMENT; }
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"+:" { return TOK_POS_INDEXED; }
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"-:" { return TOK_NEG_INDEXED; }
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@ -117,6 +117,7 @@ static void free_attr(std::map<std::string, AstNode*> *al)
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%token TOK_POS_INDEXED TOK_NEG_INDEXED TOK_ASSERT TOK_ASSUME
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%token TOK_RESTRICT TOK_COVER TOK_PROPERTY TOK_ENUM TOK_TYPEDEF
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%token TOK_RAND TOK_CONST TOK_CHECKER TOK_ENDCHECKER
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%token TOK_INCREMENT TOK_DECREMENT
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%type <ast> range range_or_multirange non_opt_range non_opt_multirange range_or_signed_int
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%type <ast> wire_type expr basic_expr concat_list rvalue lvalue lvalue_concat_list
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@ -1067,6 +1068,14 @@ simple_behavioral_stmt:
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AstNode *node = new AstNode(AST_ASSIGN_EQ, $1, $4);
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ast_stack.back()->children.push_back(node);
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} |
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lvalue TOK_INCREMENT {
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AstNode *node = new AstNode(AST_ASSIGN_EQ, $1, new AstNode(AST_ADD, $1->clone(), AstNode::mkconst_int(1, true)));
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ast_stack.back()->children.push_back(node);
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} |
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lvalue TOK_DECREMENT {
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AstNode *node = new AstNode(AST_ASSIGN_EQ, $1, new AstNode(AST_SUB, $1->clone(), AstNode::mkconst_int(1, true)));
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ast_stack.back()->children.push_back(node);
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} |
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lvalue OP_LE delay expr {
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AstNode *node = new AstNode(AST_ASSIGN_LE, $1, $4);
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ast_stack.back()->children.push_back(node);
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