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Merge branch 'read_aiger' into xaig

This commit is contained in:
Eddie Hung 2019-02-21 14:27:32 -08:00
parent 6ccaf250df d3ba1f9719
commit 3307295488
3 changed files with 8 additions and 4 deletions
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1
Makefile
View File

@ -581,6 +581,7 @@ test: $(TARGETS) $(EXTRA_TARGETS)
+cd tests/sat && bash run-test.sh +cd tests/sat && bash run-test.sh
+cd tests/svinterfaces && bash run-test.sh $(SEEDOPT) +cd tests/svinterfaces && bash run-test.sh $(SEEDOPT)
+cd tests/opt && bash run-test.sh +cd tests/opt && bash run-test.sh
+cd tests/aiger && bash run-test.sh
@echo "" @echo ""
@echo " Passed \"make test\"." @echo " Passed \"make test\"."
@echo "" @echo ""

9
frontends/aiger/aigerparse.cc
View File

@ -23,8 +23,11 @@
// http://fmv.jku.at/papers/Biere-FMV-TR-07-1.pdf // http://fmv.jku.at/papers/Biere-FMV-TR-07-1.pdf
#ifdef _WIN32 #ifdef _WIN32
#include <libgen.h>
#include <stdlib.h> #include <stdlib.h>
#endif #endif
#include <array>
#include "kernel/yosys.h" #include "kernel/yosys.h"
#include "kernel/sigtools.h" #include "kernel/sigtools.h"
#include "kernel/consteval.h" #include "kernel/consteval.h"
@ -583,7 +586,7 @@ void AigerReader::parse_aiger_ascii()
RTLIL::Wire *i2_wire = createWireIfNotExists(module, l3); RTLIL::Wire *i2_wire = createWireIfNotExists(module, l3);
module->addAndGate(o_wire->name.str() + "$and", i1_wire, i2_wire, o_wire); module->addAndGate(o_wire->name.str() + "$and", i1_wire, i2_wire, o_wire);
} }
std::getline(f, line); std::getline(f, line); // Ignore up to start of next line
} }
static unsigned parse_next_delta_literal(std::istream &f, unsigned ref) static unsigned parse_next_delta_literal(std::istream &f, unsigned ref)
@ -779,7 +782,9 @@ struct AigerFrontend : public Frontend {
_splitpath(filename.c_str(), NULL /* drive */, NULL /* dir */, fname, NULL /* ext */) _splitpath(filename.c_str(), NULL /* drive */, NULL /* dir */, fname, NULL /* ext */)
module_name = fname; module_name = fname;
#else #else
module_name = RTLIL::escape_id(basename(filename.c_str())); char* bn = strdup(filename.c_str());
module_name = RTLIL::escape_id(bn);
free(bn);
#endif #endif
} }

2
passes/techmap/abc.cc
View File

@ -52,8 +52,6 @@
#include <cerrno> #include <cerrno>
#include <sstream> #include <sstream>
#include <climits> #include <climits>
#include <array>
#include <functional>
#ifndef _WIN32 #ifndef _WIN32
# include <unistd.h> # include <unistd.h>