Add more tests

This commit is contained in:
Eddie Hung 2019-06-21 12:31:04 -07:00
parent ae8305ffcc
commit 32f637ffdb
2 changed files with 51 additions and 21 deletions

View File

@ -187,7 +187,6 @@ module case_nonexclusive_select (
);
always @* begin
case (x)
//0, 2: o = b;
0: o = b;
2: o = b;
1: o = c;
@ -202,22 +201,16 @@ endmodule
module case_nonoverlap (
input wire [2:0] x,
input wire a, b, c, d, e, f, g,
input wire a, b, c, d, e,
output reg o
);
always @* begin
case (x)
//0, 2: o = b; // Creates $reduce_or
//0: o = b; 2: o = b; // Creates $reduce_or
0: o = b;
2: o = f;
0, 2: o = b; // Creates $reduce_or
1: o = c;
default:
case (x)
//3, 4: o = d; // Creates $reduce_or
//3: o = d; 4: o = d; // Creates $reduce_or
3: o = d;
4: o = g;
3: o = d; 4: o = d; // Creates $reduce_or
5: o = e;
default: o = 1'b0;
endcase
@ -227,23 +220,37 @@ endmodule
module case_overlap (
input wire [2:0] x,
input wire a, b, c, d, e, f, g,
input wire a, b, c, d, e,
output reg o
);
always @* begin
case (x)
//0, 2: o = b; // Creates $reduce_or
//0: o = b; 2: o = b; // Creates $reduce_or
0: o = b;
2: o = f;
0, 2: o = b; // Creates $reduce_or
1: o = c;
default:
case (x)
//3, 4: o = d; // Creates $reduce_or
//3: o = d; 4: o = d; // Creates $reduce_or
2: o = 1'b1; // Overlaps with previous $pmux
3: o = d;
4: o = g;
0: o = 1'b1; // OVERLAP!
3, 4: o = d; // Creates $reduce_or
5: o = e;
default: o = 1'b0;
endcase
endcase
end
endmodule
module case_overlap2 (
input wire [2:0] x,
input wire a, b, c, d, e,
output reg o
);
always @* begin
case (x)
0: o = b; 2: o = b; // Creates $reduce_or
1: o = c;
default:
case (x)
0: o = d; 2: o = d; // Creates $reduce_or
3: o = d; 4: o = d; // Creates $reduce_or
5: o = e;
default: o = 1'b0;
endcase

View File

@ -215,8 +215,11 @@ sat -verify -prove-asserts -show-ports miter
design -load read
hierarchy -top case_nonoverlap
prep
#prep # Do not prep otherwise $pmux's overlapping entry will get removed
proc
design -save gold
opt -fast -mux_undef
select -assert-count 2 t:$pmux
muxpack
opt
stat
@ -233,6 +236,26 @@ hierarchy -top case_overlap
#prep # Do not prep otherwise $pmux's overlapping entry will get removed
proc
design -save gold
opt -fast -mux_undef
select -assert-count 2 t:$pmux
muxpack
opt
stat
select -assert-count 0 t:$mux
select -assert-count 2 t:$pmux
design -stash gate
design -import gold -as gold
design -import gate -as gate
miter -equiv -flatten -make_assert -make_outputs gold gate miter
sat -verify -prove-asserts -show-ports miter
design -load read
hierarchy -top case_overlap2
#prep # Do not prep otherwise $pmux's overlapping entry will get removed
proc
design -save gold
opt -fast -mux_undef
select -assert-count 2 t:$pmux
muxpack
opt
stat