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celledges: Use b_width_capped for left shifts 

`b_width_capped` already exists for preventing arithmetic overflow, limiting the value of `b_width` to 30.  This just changes the left shifts to also use it.
The caveat of incorrect results for extremely large values of `a_width` still applies, as does the improbability of that actually happening.
This fixes #4844 (or at least, the floating point exception; the circuit still isn't valid but I think that's fine).
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KrystalDelusion 2025-01-31 11:03:33 +13:00 committed by GitHub
parent f445479374
commit 31b00b4c72
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1 changed files with 3 additions and 3 deletions
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6
kernel/celledges.cc
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@ -253,13 +253,13 @@ void shift_op(AbstractCellEdgesDatabase *db, RTLIL::Cell *cell)
if (a_width == 1 && is_signed) { if (a_width == 1 && is_signed) {
int skip = 1 << (k + 1); int skip = 1 << (k + 1);
int base = skip -1; int base = skip -1;
if (i % skip != base && i - a_width + 2 < 1 << b_width) if (i % skip != base && i - a_width + 2 < 1 << b_width_capped)
db->add_edge(cell, ID::B, k, ID::Y, i, -1); db->add_edge(cell, ID::B, k, ID::Y, i, -1);
} else if (is_signed) { } else if (is_signed) {
if (i - a_width + 2 < 1 << b_width) if (i - a_width + 2 < 1 << b_width_capped)
db->add_edge(cell, ID::B, k, ID::Y, i, -1); db->add_edge(cell, ID::B, k, ID::Y, i, -1);
} else { } else {
if (i - a_width + 1 < 1 << b_width) if (i - a_width + 1 < 1 << b_width_capped)
db->add_edge(cell, ID::B, k, ID::Y, i, -1); db->add_edge(cell, ID::B, k, ID::Y, i, -1);
} }
// right shifts // right shifts