mirror of https://github.com/YosysHQ/yosys.git
Make iopad option default for all xilinx flows
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aa1adb0f1e
commit
2fcf683af4
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@ -64,7 +64,7 @@ struct SynthXilinxPass : public ScriptPass
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log(" (this feature is experimental and incomplete)\n");
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log("\n");
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log(" -ise\n");
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log(" generate an output netlist suitable for ISE (enables -iopad)\n");
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log(" generate an output netlist suitable for ISE\n");
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log("\n");
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log(" -nobram\n");
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log(" do not use block RAM cells in output netlist\n");
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@ -84,11 +84,8 @@ struct SynthXilinxPass : public ScriptPass
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log(" -nodsp\n");
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log(" do not use DSP48E1s to implement multipliers and associated logic\n");
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log("\n");
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log(" -iopad\n");
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log(" enable I/O buffer insertion (selected automatically by -ise)\n");
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log("\n");
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log(" -noiopad\n");
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log(" disable I/O buffer insertion (only useful with -ise)\n");
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log(" disable I/O buffer insertion\n");
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log("\n");
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log(" -noclkbuf\n");
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log(" disable automatic clock buffer insertion\n");
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@ -122,7 +119,7 @@ struct SynthXilinxPass : public ScriptPass
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}
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std::string top_opt, edif_file, blif_file, family;
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bool flatten, retime, vpr, ise, iopad, noiopad, noclkbuf, nobram, nolutram, nosrl, nocarry, nowidelut, nodsp, uram, abc9;
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bool flatten, retime, vpr, ise, noiopad, noclkbuf, nobram, nolutram, nosrl, nocarry, nowidelut, nodsp, uram, abc9;
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bool flatten_before_abc;
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int widemux;
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@ -136,7 +133,6 @@ struct SynthXilinxPass : public ScriptPass
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retime = false;
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vpr = false;
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ise = false;
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iopad = false;
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noiopad = false;
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noclkbuf = false;
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nocarry = false;
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@ -212,10 +208,6 @@ struct SynthXilinxPass : public ScriptPass
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ise = true;
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continue;
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}
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if (args[argidx] == "-iopad") {
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iopad = true;
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continue;
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}
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if (args[argidx] == "-noiopad") {
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noiopad = true;
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continue;
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@ -282,7 +274,6 @@ struct SynthXilinxPass : public ScriptPass
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void script() YS_OVERRIDE
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{
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bool do_iopad = iopad || (ise && !noiopad);
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std::string ff_map_file;
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if (help_mode)
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ff_map_file = "+/xilinx/{family}_ff_map.v";
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@ -514,8 +505,8 @@ struct SynthXilinxPass : public ScriptPass
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if (check_label("map_cells")) {
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// Needs to be done before logic optimization, so that inverters (OE vs T) are handled.
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if (help_mode || do_iopad)
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run("iopadmap -bits -outpad OBUF I:O -inpad IBUF O:I -toutpad $__XILINX_TOUTPAD OE:I:O -tinoutpad $__XILINX_TINOUTPAD OE:O:I:IO A:top", "(only if '-iopad' or '-ise' and not '-noiopad')");
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if (help_mode || !noiopad)
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run("iopadmap -bits -outpad OBUF I:O -inpad IBUF O:I -toutpad $__XILINX_TOUTPAD OE:I:O -tinoutpad $__XILINX_TINOUTPAD OE:O:I:IO A:top", "(only if not '-noiopad')");
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std::string techmap_args = "-map +/techmap.v -map +/xilinx/cells_map.v";
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if (widemux > 0)
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techmap_args += stringf(" -D MIN_MUX_INPUTS=%d", widemux);
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