diff --git a/frontends/vhdl2verilog/vhdl2verilog.cc b/frontends/vhdl2verilog/vhdl2verilog.cc index d8568fe94..83035d329 100644 --- a/frontends/vhdl2verilog/vhdl2verilog.cc +++ b/frontends/vhdl2verilog/vhdl2verilog.cc @@ -27,6 +27,7 @@ #include #include #include +#include struct Vhdl2verilogPass : public Pass { Vhdl2verilogPass() : Pass("vhdl2verilog", "importing VHDL designs using vhdl2verilog") { } diff --git a/passes/abc/abc.cc b/passes/abc/abc.cc index 24a634f65..286b750cc 100644 --- a/passes/abc/abc.cc +++ b/passes/abc/abc.cc @@ -45,6 +45,7 @@ #include #include #include +#include #include "blifparse.h"