mirror of https://github.com/YosysHQ/yosys.git
Added RTLIL::SigSpec::repeat()
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20a7965f61
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@ -1796,6 +1796,14 @@ void RTLIL::SigSpec::extend_u0(int width, bool is_signed)
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}
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RTLIL::SigSpec RTLIL::SigSpec::repeat(int num) const
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{
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RTLIL::SigSpec sig;
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for (int i = 0; i < num; i++)
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sig.append(*this);
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return sig;
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}
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void RTLIL::SigSpec::check() const
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{
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if (packed())
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@ -565,6 +565,8 @@ public:
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void extend(int width, bool is_signed = false);
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void extend_u0(int width, bool is_signed = false);
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RTLIL::SigSpec repeat(int num) const;
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bool operator <(const RTLIL::SigSpec &other) const;
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bool operator ==(const RTLIL::SigSpec &other) const;
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inline bool operator !=(const RTLIL::SigSpec &other) const { return !(*this == other); }
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