ice40: remove impossible test.

iCE40 does not have LUTRAM. This was erroneously added in commit
caab66111e, and tested for BRAM,
essentially a duplicate of the "dpram.ys" test.
This commit is contained in:
whitequark 2020-01-01 03:59:25 +00:00
parent d44848328b
commit 29d130dee9
1 changed files with 0 additions and 15 deletions

View File

@ -1,15 +0,0 @@
read_verilog ../common/lutram.v
hierarchy -top lutram_1w1r
proc
memory -nomap
equiv_opt -run :prove -map +/ice40/cells_sim.v synth_ice40
memory
opt -full
miter -equiv -flatten -make_assert -make_outputs gold gate miter
sat -verify -prove-asserts -seq 5 -set-init-zero -show-inputs -show-outputs miter
design -load postopt
cd lutram_1w1r
select -assert-count 1 t:SB_RAM40_4K
select -assert-none t:SB_RAM40_4K %% t:* %D