mirror of https://github.com/YosysHQ/yosys.git
Some cleanup, revert sat.cc
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8665f48879
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@ -460,15 +460,19 @@ bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff)
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}
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if (sat && has_init) {
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std::vector<int> removed_sigbits;
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bool removed_sigbits = false;
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// Create netlist for the module if not already available
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if (!netlists.count(mod)) {
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netlists.emplace(mod, Netlist(mod));
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comb_filters.emplace(mod, comb_cells_filt());
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}
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// Load netlist for the module from the pool
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Netlist &net = netlists.at(mod);
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// For each register bit, try to prove that it cannot change from the initial value. If so, remove it
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for (int position = 0; position < GetSize(sig_d); position += 1) {
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RTLIL::SigBit q_sigbit = sig_q[position];
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RTLIL::SigBit d_sigbit = sig_d[position];
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@ -480,6 +484,7 @@ bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff)
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ezSatPtr ez;
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SatGen satgen(ez.get(), &net.sigmap);
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// Create SAT instance only for the cells that influence the register bit combinatorially
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for (const auto &cell : cell_cone(net, d_sigbit, &comb_filters.at(mod))) {
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if (!satgen.importCell(cell))
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log_error("Can't create SAT model for cell %s (%s)!\n", RTLIL::id2cstr(cell->name),
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@ -492,12 +497,10 @@ bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff)
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int q_sat_pi = satgen.importSigBit(q_sigbit);
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int d_sat_pi = satgen.importSigBit(d_sigbit);
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// Try to find out whether the register bit can change under some circumstances
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bool counter_example_found = ez->solve(ez->IFF(q_sat_pi, init_sat_pi), ez->NOT(ez->IFF(d_sat_pi, init_sat_pi)));
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if (position == 14) {
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counter_example_found = false;
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}
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// If the register bit cannot change, we can replace it with a constant
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if (!counter_example_found) {
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RTLIL::SigBit &driver_port = net.driver_port(q_sigbit);
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@ -511,11 +514,11 @@ bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff)
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mod->connect(RTLIL::SigSig(q_sigbit, sigbit_init_val));
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removed_sigbits.push_back(position);
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removed_sigbits = true;
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}
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}
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if (!removed_sigbits.empty()) {
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if (removed_sigbits) {
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return true;
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}
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}
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@ -1548,20 +1548,17 @@ struct SatPass : public Pass {
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print_proof_failed();
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tip_failed:
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design->scratchpad_set_bool("sat.success", false);
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if (verify) {
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log("\n");
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log_error("Called with -verify and proof did fail!\n");
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}
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if (0) {
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if (0)
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tip_success:
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design->scratchpad_set_bool("sat.success", true);
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if (falsify) {
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log("\n");
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log_error("Called with -falsify and proof did succeed!\n");
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}
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}
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}
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else
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{
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@ -1631,7 +1628,6 @@ struct SatPass : public Pass {
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if (sathelper.solve())
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{
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design->scratchpad_set_bool("sat.success", false);
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if (max_undef) {
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log("SAT model found. maximizing number of undefs.\n");
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sathelper.maximize_undefs();
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@ -1671,7 +1667,6 @@ struct SatPass : public Pass {
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}
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else
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{
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design->scratchpad_set_bool("sat.success", true);
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if (sathelper.gotTimeout)
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goto timeout;
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if (rerun_counter)
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