mirror of https://github.com/YosysHQ/yosys.git
Fix segfault in printing of some internal error messages
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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@ -792,7 +792,7 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *foun
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// everything should have been handled above -> print error if not.
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default:
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for (auto f : log_files)
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current_ast->dumpAst(f, "verilog-ast> ");
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current_ast_mod->dumpAst(f, "verilog-ast> ");
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log_file_error(filename, linenum, "Don't know how to detect sign and width for %s node!\n", type2str(type).c_str());
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}
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@ -1565,7 +1565,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
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// everything should have been handled above -> print error if not.
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default:
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for (auto f : log_files)
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current_ast->dumpAst(f, "verilog-ast> ");
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current_ast_mod->dumpAst(f, "verilog-ast> ");
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type_name = type2str(type);
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log_file_error(filename, linenum, "Don't know how to generate RTLIL code for %s node!\n", type_name.c_str());
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}
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