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Merge pull request #2574 from dh73/master
Accept disable case for SVA liveness properties.
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commit
27d7741540
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@ -1759,6 +1759,11 @@ struct VerificSvaImporter
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clocking.addDff(NEW_ID, sig_en, sig_en_q, State::S0);
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}
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// accept in disable case
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if (clocking.disable_sig != State::S0)
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sig_a_q = module->Or(NEW_ID, sig_a_q, clocking.disable_sig);
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// generate fair/live cell
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RTLIL::Cell *c = nullptr;
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