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Removed a line jump into the CHANGELOG 

Signed-off-by: Rodrigo Alejandro Melo <rodrigomelo9@gmail.com>
This commit is contained in:
Rodrigo Alejandro Melo 2020-02-01 22:48:03 -03:00
parent eaaba6e091
commit 2774aae0f2
1 changed files with 2 additions and 3 deletions
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@ -53,13 +53,12 @@ Yosys 0.9 .. Yosys 0.9-dev
- Added support for flip-flops with synchronous reset to synth_xilinx - Added support for flip-flops with synchronous reset to synth_xilinx
- Added support for flip-flops with reset and enable to synth_xilinx - Added support for flip-flops with reset and enable to synth_xilinx
- Added "check -mapped" - Added "check -mapped"
- Added checking of SystemVerilog always block types (always_comb, - Added checking of SystemVerilog always block types (always_comb, always_latch and always_ff)
always_latch and always_ff)
- Added "xilinx_dffopt" pass - Added "xilinx_dffopt" pass
- Added "scratchpad" pass - Added "scratchpad" pass
- Added "abc9 -dff" - Added "abc9 -dff"
- Added "synth_xilinx -dff" - Added "synth_xilinx -dff"
- Improved support of $readmem[hb] file inclusion which is now relative to the Verilog file - Improved support of $readmem[hb] Memory Content File inclusion
Yosys 0.8 .. Yosys 0.9 Yosys 0.8 .. Yosys 0.9
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