From 26db5a11d3ab3657adb77f3a7d0cabbd19529033 Mon Sep 17 00:00:00 2001
From: Dag Lem <dag@nimrod.no>
Date: Sun, 22 Jan 2023 09:32:24 +0100
Subject: [PATCH] Resolve struct member package types

---
 frontends/verilog/verilog_parser.y | 7 +++++++
 tests/svtypes/typedef_struct.sv    | 4 ++++
 2 files changed, 11 insertions(+)

diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 70ee47561..87b50438a 100644
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -173,6 +173,13 @@ static bool isInLocalScope(const std::string *name)
 
 static AstNode *getTypeDefinitionNode(std::string type_name)
 {
+	// check package types
+	if (type_name.find("::") != std::string::npos && pkg_user_types.count(type_name) > 0) {
+		auto typedef_node = pkg_user_types[type_name];
+		log_assert(typedef_node->type == AST_TYPEDEF);
+		return typedef_node->children[0];
+	}
+
 	// check current scope then outer scopes for a name
 	for (auto it = user_type_stack.rbegin(); it != user_type_stack.rend(); ++it) {
 		if (it->count(type_name) > 0) {
diff --git a/tests/svtypes/typedef_struct.sv b/tests/svtypes/typedef_struct.sv
index 7ae007952..8df8e32b0 100644
--- a/tests/svtypes/typedef_struct.sv
+++ b/tests/svtypes/typedef_struct.sv
@@ -16,6 +16,7 @@ module top;
 		bit		a;
 		logic[7:0]	b;
 		t_t		t;
+		p::p_t		ps;
 	} s_t;
 
 	s_t s;
@@ -29,6 +30,7 @@ module top;
 	assign s1 = s;
 	assign ps.a = 8'hAA;
 	assign ps.b = 8'h55;
+	assign s.ps = ps;
 
 	always_comb begin
 		assert(s.a == 1'b1);
@@ -37,6 +39,8 @@ module top;
 		assert(s1.t == 8'h55);
 		assert(ps.a == 8'hAA);
 		assert(ps.b == 8'h55);
+		assert(s.ps.a == 8'hAA);
+		assert(s.ps.b == 8'h55);
 	end
 
 endmodule