mirror of https://github.com/YosysHQ/yosys.git
Merge pull request #2 from mschmoelzer/master
"fsm_export" pass: fix KISS file generation.
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commit
26a192b8c7
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@ -80,9 +80,10 @@ void write_kiss2(struct RTLIL::Module *module, struct RTLIL::Cell *cell) {
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fsm_data.copy_from_cell(cell);
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fsm_data.copy_from_cell(cell);
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kiss_file << ".start_kiss" << std::endl;
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kiss_file << ".i " << std::dec << fsm_data.num_inputs << std::endl;
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kiss_file << ".i " << std::dec << fsm_data.num_inputs << std::endl;
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kiss_file << ".o " << std::dec << fsm_data.num_outputs << std::endl;
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kiss_file << ".o " << std::dec << fsm_data.num_outputs << std::endl;
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kiss_file << ".p " << std::dec << fsm_data.transition_table.size() << std::endl;
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kiss_file << ".s " << std::dec << fsm_data.state_table.size() << std::endl;
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kiss_file << ".r s" << std::dec << fsm_data.reset_state << std::endl;
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kiss_file << ".r s" << std::dec << fsm_data.reset_state << std::endl;
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for (i = 0; i < fsm_data.transition_table.size(); i++) {
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for (i = 0; i < fsm_data.transition_table.size(); i++) {
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@ -100,7 +101,6 @@ void write_kiss2(struct RTLIL::Module *module, struct RTLIL::Cell *cell) {
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}
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}
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}
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}
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kiss_file << ".end_kiss" << std::endl << ".end" << std::endl;
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kiss_file.close();
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kiss_file.close();
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}
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}
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