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fabulous: Add CLK to BRAM interface primitives
Signed-off-by: gatecat <gatecat@ds0.me>
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@ -93,13 +93,13 @@ module Global_Clock (output CLK);
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endmodule
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(* blackbox, keep *)
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module InPass4_frame_config (output O0, O1, O2, O3);
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module InPass4_frame_config (input CLK, output O0, O1, O2, O3);
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endmodule
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(* blackbox, keep *)
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module OutPass4_frame_config (input I0, I1, I2, I3);
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module OutPass4_frame_config (input CLK, I0, I1, I2, I3);
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endmodule
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@ -414,4 +414,4 @@ module LUTFF_ESS (
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O <= D;
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end
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endmodule
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`endif // COMPLEX_DFF
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`endif // COMPLEX_DFF
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