mirror of https://github.com/YosysHQ/yosys.git
Merge mistake
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@ -259,13 +259,6 @@ struct SynthXilinxPass : public ScriptPass
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run("dff2dffe");
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run("opt -full");
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if (vpr && !nocarry && !help_mode)
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run("techmap -map +/xilinx/arith_map.v -D _EXPLICIT_CARRY");
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else if (abc == "abc9" && !nocarry && !help_mode)
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run("techmap -map +/xilinx/arith_map.v -D _CLB_CARRY", "(skip if '-nocarry')");
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else if (!nocarry || help_mode)
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run("techmap -map +/xilinx/arith_map.v", "(skip if '-nocarry')");
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if (!nosrl || help_mode) {
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// shregmap operates on bit-level flops, not word-level,
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// so break those down here
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@ -274,13 +267,12 @@ struct SynthXilinxPass : public ScriptPass
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run("shregmap -tech xilinx -minlen 3", "(skip if '-nosrl')");
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}
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if (!nomux || help_mode)
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run("techmap -map +/xilinx/cells_map.v");
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if (!vpr || help_mode)
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run("techmap -map +/techmap.v -map +/xilinx/arith_map.v");
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else
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run("techmap -map +/techmap.v +/xilinx/arith_map.v -D _EXPLICIT_CARRY");
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if (vpr && !nocarry && !help_mode)
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run("techmap -map +/techmap.v -map +/xilinx/arith_map.v -D _EXPLICIT_CARRY");
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else if (abc == "abc9" && !nocarry && !help_mode)
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run("techmap -map +/techmap.v -map +/xilinx/arith_map.v -D _CLB_CARRY", "(skip if '-nocarry')");
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else if (!nocarry || help_mode)
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run("techmap -map +/techmap.v -map +/xilinx/arith_map.v", "(skip if '-nocarry')");
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run("opt -fast");
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}
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