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flatten: clarify confusing error message.

This commit is contained in:
whitequark 2021-01-26 18:29:16 +00:00
parent 8eaeaa8434
commit 2364820f50
1 changed files with 1 additions and 1 deletions
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2
passes/techmap/flatten.cc
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@ -211,7 +211,7 @@ struct FlattenWorker
log_assert(new_conn.first.size() == new_conn.second.size());
if (sigmap(new_conn.first).has_const())
log_error("Mismatch in directionality for cell port %s.%s.%s: %s <= %s\n",
log_error("Cell port %s.%s.%s is driving constant bits: %s <= %s\n",
log_id(module), log_id(cell), log_id(port_it.first), log_signal(new_conn.first), log_signal(new_conn.second));
module->connect(new_conn);