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Merge pull request #2074 from YosysHQ/eddie/ecp5_cleanup 

ecp5: cleanup unused +/ecp5/abc9_model.v
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Eddie Hung 2020-05-23 09:28:42 -07:00 committed by GitHub
parent 721040df76 76e0cc8276
commit 227c3ff310
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3 changed files with 0 additions and 14 deletions
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1
techlibs/ecp5/Makefile.inc
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@ -23,7 +23,6 @@ $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/brams.txt))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/arith_map.v))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/latches_map.v))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/dsp_map.v))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc9_model.v))
EXTRA_OBJS += techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk
.SECONDARY: techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk

12
techlibs/ecp5/abc9_model.v
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@ -1,12 +0,0 @@
// ---------------------------------------
(* abc9_box *)
module \$__ABC9_DPR16X4_COMB (input [3:0] $DO, RAD, output [3:0] DO);
specify
($DO => DO) = 0;
(RAD[0] *> DO) = 141;
(RAD[1] *> DO) = 379;
(RAD[2] *> DO) = 275;
(RAD[3] *> DO) = 379;
endspecify
endmodule

1
techlibs/ecp5/synth_ecp5.cc
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@ -334,7 +334,6 @@ struct SynthEcp5Pass : public ScriptPass
run("techmap -map +/ecp5/latches_map.v", "(skip if -asyncprld)");
if (abc9) {
run("read_verilog -icells -lib -specify +/ecp5/abc9_model.v");
std::string abc9_opts;
if (nowidelut)
abc9_opts += " -maxlut 4";