fixup verilog doubleslash test

- add generated doubleslash.v to .gitignore
- ensure backend verilog can be read again
This commit is contained in:
Zachary Snow 2021-12-30 00:06:23 -07:00 committed by Zachary Snow
parent 8c509a5659
commit 207af4196b
2 changed files with 3 additions and 0 deletions

View File

@ -3,3 +3,4 @@
/run-test.mk /run-test.mk
/const_arst.v /const_arst.v
/const_sr.v /const_sr.v
/doubleslash.v

View File

@ -17,3 +17,5 @@ proc
opt -full opt -full
write_verilog doubleslash.v write_verilog doubleslash.v
design -reset
read_verilog doubleslash.v