mirror of https://github.com/YosysHQ/yosys.git
check: Omit private wires in loop report
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5924d97381
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206d894c56
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@ -338,12 +338,15 @@ struct CheckPass : public Pass {
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MatchingEdgePrinter printer(message, sigmap, prev, bit);
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MatchingEdgePrinter printer(message, sigmap, prev, bit);
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printer.add_edges_from_cell(driver);
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printer.add_edges_from_cell(driver);
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if (wire->name.isPublic()) {
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std::string wire_src;
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std::string wire_src;
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if (wire->has_attribute(ID::src)) {
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if (wire->has_attribute(ID::src)) {
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std::string src_attr = wire->get_src_attribute();
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std::string src_attr = wire->get_src_attribute();
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wire_src = stringf(" source: %s", src_attr.c_str());
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wire_src = stringf(" source: %s", src_attr.c_str());
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}
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}
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message += stringf(" wire %s%s\n", log_signal(SigBit(wire, pair.second)), wire_src.c_str());
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message += stringf(" wire %s%s\n", log_signal(SigBit(wire, pair.second)), wire_src.c_str());
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}
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prev = bit;
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prev = bit;
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}
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}
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log_warning("%s", message.c_str());
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log_warning("%s", message.c_str());
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