mirror of https://github.com/YosysHQ/yosys.git
Add "add -mod"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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1f64b34c64
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@ -105,6 +105,11 @@ struct AddPass : public Pass {
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log("Like 'add -input', but also connect the signal between instances of the\n");
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log("selected modules.\n");
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log("\n");
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log("\n");
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log(" add -mod <name[s]>\n");
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log("\n");
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log("Add module[s] with the specified name[s].\n");
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log("\n");
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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@ -113,6 +118,7 @@ struct AddPass : public Pass {
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bool arg_flag_input = false;
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bool arg_flag_output = false;
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bool arg_flag_global = false;
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bool mod_mode = false;
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int arg_width = 0;
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size_t argidx;
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@ -133,8 +139,20 @@ struct AddPass : public Pass {
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arg_width = atoi(args[++argidx].c_str());
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continue;
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}
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if (arg == "-mod") {
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mod_mode = true;
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argidx++;
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break;
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}
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break;
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}
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if (mod_mode) {
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for (; argidx < args.size(); argidx++)
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design->addModule(RTLIL::escape_id(args[argidx]));
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return;
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}
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extra_args(args, argidx, design);
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for (auto &mod : design->modules_)
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