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write_xaiger: do not export flop inputs as POs

This commit is contained in:
Eddie Hung 2020-01-14 16:17:27 -08:00
parent 770e301b21
commit 1c41dc6b95
1 changed files with 6 additions and 2 deletions
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8
backends/aiger/xaiger.cc
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@ -226,6 +226,7 @@ struct XAigerWriter
} }
if (inst_module) { if (inst_module) {
bool abc9_flop = inst_module->get_bool_attribute("\\abc9_flop");
auto it = cell->attributes.find("\\abc9_box_seq"); auto it = cell->attributes.find("\\abc9_box_seq");
if (it != cell->attributes.end()) { if (it != cell->attributes.end()) {
int abc9_box_seq = it->second.as_int(); int abc9_box_seq = it->second.as_int();
@ -233,7 +234,7 @@ struct XAigerWriter
box_list.resize(abc9_box_seq+1); box_list.resize(abc9_box_seq+1);
box_list[abc9_box_seq] = cell; box_list[abc9_box_seq] = cell;
// Only flop boxes may have arrival times // Only flop boxes may have arrival times
if (!inst_module->get_bool_attribute("\\abc9_flop")) if (!abc9_flop)
continue; continue;
} }
@ -256,6 +257,9 @@ struct XAigerWriter
for (auto bit : sigmap(conn.second)) for (auto bit : sigmap(conn.second))
arrival_times[bit] = arrival; arrival_times[bit] = arrival;
} }
if (abc9_flop)
continue;
} }
} }
@ -591,7 +595,7 @@ struct XAigerWriter
// For flops only, create an extra 1-bit input that drives a new wire // For flops only, create an extra 1-bit input that drives a new wire
// called "<cell>.abc9_ff.Q" that is used below // called "<cell>.abc9_ff.Q" that is used below
if (box_module->get_bool_attribute("\\abc9_flop")) if (box_module->get_bool_attribute("\\abc9_flop"))
box_inputs++; box_inputs++;
std::get<0>(v) = box_inputs; std::get<0>(v) = box_inputs;
std::get<1>(v) = box_outputs; std::get<1>(v) = box_outputs;