Add "verific -vlog-libdir"

This commit is contained in:
Clifford Wolf 2017-10-13 20:23:19 +02:00
parent e7a3c47cc7
commit 1954c78ea7
1 changed files with 12 additions and 0 deletions

View File

@ -1856,6 +1856,12 @@ struct VerificPass : public Pass {
log("Add Verilog include directories.\n"); log("Add Verilog include directories.\n");
log("\n"); log("\n");
log("\n"); log("\n");
log(" verific -vlog-libdir <directory>..\n");
log("\n");
log("Add Verilog library directories. Verific will search in this directories to\n");
log("find undefined modules.\n");
log("\n");
log("\n");
log(" verific -vlog-define <macro>[=<value>]..\n"); log(" verific -vlog-define <macro>[=<value>]..\n");
log("\n"); log("\n");
log("Add Verilog defines. (The macros SYNTHESIS and VERIFIC are defined implicitly.)\n"); log("Add Verilog defines. (The macros SYNTHESIS and VERIFIC are defined implicitly.)\n");
@ -1942,6 +1948,12 @@ struct VerificPass : public Pass {
goto check_error; goto check_error;
} }
if (GetSize(args) > argidx && args[argidx] == "-vlog-libdir") {
for (argidx++; argidx < GetSize(args); argidx++)
veri_file::AddYDir(args[argidx].c_str());
goto check_error;
}
if (GetSize(args) > argidx && args[argidx] == "-vlog-define") { if (GetSize(args) > argidx && args[argidx] == "-vlog-define") {
for (argidx++; argidx < GetSize(args); argidx++) { for (argidx++; argidx < GetSize(args); argidx++) {
string name = args[argidx]; string name = args[argidx];