mirror of https://github.com/YosysHQ/yosys.git
Fix scope
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190e44f0da
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@ -194,7 +194,7 @@ struct SimInstance
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Module *mod = module->design->module(cell->type);
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Module *mod = module->design->module(cell->type);
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if (mod != nullptr) {
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if (mod != nullptr) {
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dirty_children.insert(new SimInstance(shared, scope + "." + RTLIL::unescape_id(module->name), mod, cell, this));
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dirty_children.insert(new SimInstance(shared, scope + "." + RTLIL::unescape_id(cell->name), mod, cell, this));
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}
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}
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for (auto &port : cell->connections()) {
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for (auto &port : cell->connections()) {
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