mirror of https://github.com/YosysHQ/yosys.git
Merge branch 'tux3-implicit_named_connection'
This commit is contained in:
commit
169de05f3b
|
@ -1557,6 +1557,15 @@ cell_port:
|
|||
astbuf2->children.push_back(node);
|
||||
delete $3;
|
||||
free_attr($1);
|
||||
} |
|
||||
attr '.' TOK_ID {
|
||||
AstNode *node = new AstNode(AST_ARGUMENT);
|
||||
node->str = *$3;
|
||||
astbuf2->children.push_back(node);
|
||||
node->children.push_back(new AstNode(AST_IDENTIFIER));
|
||||
node->children.back()->str = *$3;
|
||||
delete $3;
|
||||
free_attr($1);
|
||||
};
|
||||
|
||||
always_stmt:
|
||||
|
|
|
@ -0,0 +1,16 @@
|
|||
// Test implicit port connections
|
||||
module alu (input [2:0] a, input [2:0] b, input cin, output cout, output [2:0] result);
|
||||
assign cout = cin;
|
||||
assign result = a + b;
|
||||
endmodule
|
||||
|
||||
module named_ports(input [2:0] a, b, output [2:0] alu_result, output cout);
|
||||
wire cin = 1;
|
||||
alu alu (
|
||||
.a(a),
|
||||
.b, // Implicit connection is equivalent to .b(b)
|
||||
.cin(), // Explicitely unconnected
|
||||
.cout(cout),
|
||||
.result(alu_result)
|
||||
);
|
||||
endmodule
|
|
@ -17,4 +17,5 @@ if ! which iverilog > /dev/null ; then
|
|||
exit 1
|
||||
fi
|
||||
|
||||
exec ${MAKE:-make} -f ../tools/autotest.mk $seed *.v
|
||||
shopt -s nullglob
|
||||
exec ${MAKE:-make} -f ../tools/autotest.mk $seed *.{sv,v}
|
||||
|
|
|
@ -89,6 +89,13 @@ done
|
|||
|
||||
compile_and_run() {
|
||||
exe="$1"; output="$2"; shift 2
|
||||
ext=${1##*.}
|
||||
if [ "$ext" == "sv" ]; then
|
||||
language_gen="-g2012"
|
||||
else
|
||||
language_gen="-g2005"
|
||||
fi
|
||||
|
||||
if $use_modelsim; then
|
||||
altver=$( ls -v /opt/altera/ | grep '^[0-9]' | tail -n1; )
|
||||
/opt/altera/$altver/modelsim_ase/bin/vlib work
|
||||
|
@ -99,7 +106,7 @@ compile_and_run() {
|
|||
/opt/Xilinx/Vivado/$xilver/bin/xvlog $xinclude_opts -d outfile=\"$output\" "$@"
|
||||
/opt/Xilinx/Vivado/$xilver/bin/xelab -R work.testbench
|
||||
else
|
||||
iverilog $include_opts -Doutfile=\"$output\" -s testbench -o "$exe" "$@"
|
||||
iverilog $language_gen $include_opts -Doutfile=\"$output\" -s testbench -o "$exe" "$@"
|
||||
vvp -n "$exe"
|
||||
fi
|
||||
}
|
||||
|
@ -110,7 +117,7 @@ for fn
|
|||
do
|
||||
bn=${fn%.*}
|
||||
ext=${fn##*.}
|
||||
if [[ "$ext" != "v" ]] && [[ "$ext" != "aag" ]] && [[ "$ext" != "aig" ]]; then
|
||||
if [[ "$ext" != "v" ]] && [[ "$ext" != "sv" ]] && [[ "$ext" != "aag" ]] && [[ "$ext" != "aig" ]]; then
|
||||
echo "Invalid argument: $fn" >&2
|
||||
exit 1
|
||||
fi
|
||||
|
@ -123,6 +130,10 @@ do
|
|||
echo -n "Test: $bn "
|
||||
fi
|
||||
|
||||
if [ "$ext" == sv ]; then
|
||||
frontend="$frontend -sv"
|
||||
fi
|
||||
|
||||
rm -f ${bn}.{err,log,skip}
|
||||
mkdir -p ${bn}.out
|
||||
rm -rf ${bn}.out/*
|
||||
|
|
Loading…
Reference in New Issue