mirror of https://github.com/YosysHQ/yosys.git
Added "sat -tempinduct-baseonly -tempinduct-inductonly"
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@ -984,6 +984,12 @@ struct SatPass : public Pass {
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log(" Perform a temporal induction proof. Assume an initial state with all\n");
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log(" registers set to defined values for the induction step.\n");
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log("\n");
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log(" -tempinduct-baseonly\n");
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log(" Run only the basecase half of temporal induction (requires -maxsteps)\n");
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log("\n");
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log(" -tempinduct-inductonly\n");
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log(" Run only the induction half of temporal induction\n");
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log("\n");
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log(" -prove <signal> <value>\n");
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log(" Attempt to proof that <signal> is always <value>.\n");
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log("\n");
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@ -1030,6 +1036,7 @@ struct SatPass : public Pass {
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bool ignore_div_by_zero = false, set_init_undef = false, set_init_zero = false, max_undef = false;
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bool tempinduct = false, prove_asserts = false, show_inputs = false, show_outputs = false;
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bool ignore_unknown_cells = false, falsify = false, tempinduct_def = false, set_init_def = false;
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bool tempinduct_baseonly = false, tempinduct_inductonly = false;
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std::string vcd_file_name, json_file_name, cnf_file_name;
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log_header("Executing SAT pass (solving SAT problems in the circuit).\n");
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@ -1122,6 +1129,16 @@ struct SatPass : public Pass {
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tempinduct_def = true;
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continue;
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}
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if (args[argidx] == "-tempinduct-baseonly") {
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tempinduct = true;
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tempinduct_baseonly = true;
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continue;
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}
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if (args[argidx] == "-tempinduct-inductonly") {
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tempinduct = true;
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tempinduct_inductonly = true;
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continue;
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}
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if (args[argidx] == "-prove" && argidx+2 < args.size()) {
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std::string lhs = args[++argidx];
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std::string rhs = args[++argidx];
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@ -1305,6 +1322,7 @@ struct SatPass : public Pass {
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basecase.ignore_unknown_cells = ignore_unknown_cells;
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for (int timestep = 1; timestep <= seq_len; timestep++)
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if (!tempinduct_inductonly)
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basecase.setup(timestep);
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inductstep.sets = sets;
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@ -1319,8 +1337,10 @@ struct SatPass : public Pass {
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inductstep.satgen.ignore_div_by_zero = ignore_div_by_zero;
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inductstep.ignore_unknown_cells = ignore_unknown_cells;
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if (!tempinduct_baseonly) {
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inductstep.setup(1);
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inductstep.ez->assume(inductstep.setup_proof(1));
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}
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if (tempinduct_def) {
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std::vector<int> undef_state = inductstep.satgen.importUndefSigSpec(inductstep.satgen.initial_state.export_all(), 1);
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@ -1333,6 +1353,8 @@ struct SatPass : public Pass {
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// phase 1: proving base case
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if (!tempinduct_inductonly)
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{
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basecase.setup(seq_len + inductlen);
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int property = basecase.setup_proof(seq_len + inductlen);
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basecase.generate_model();
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@ -1364,11 +1386,14 @@ struct SatPass : public Pass {
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log("Base case for induction length %d proven.\n", inductlen);
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basecase.ez->assume(property);
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}
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// phase 2: proving induction step
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if (!tempinduct_baseonly)
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{
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inductstep.setup(inductlen + 1);
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property = inductstep.setup_proof(inductlen + 1);
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int property = inductstep.setup_proof(inductlen + 1);
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inductstep.generate_model();
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if (inductlen > 1)
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@ -1411,6 +1436,7 @@ struct SatPass : public Pass {
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inductstep.print_model();
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}
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}
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}
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log("\nReached maximum number of time steps -> proof failed.\n");
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if(!vcd_file_name.empty())
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