mirror of https://github.com/YosysHQ/yosys.git
Remove "write_xaiger -zinit"
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e1554b56dd
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1504ca2cd9
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@ -76,7 +76,6 @@ void aiger_encode(std::ostream &f, int x)
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struct XAigerWriter
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{
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Module *module;
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bool zinit_mode;
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SigMap sigmap;
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dict<SigBit, bool> init_map;
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@ -141,7 +140,7 @@ struct XAigerWriter
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return a;
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}
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XAigerWriter(Module *module, bool zinit_mode, bool holes_mode=false) : module(module), zinit_mode(zinit_mode), sigmap(module)
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XAigerWriter(Module *module, bool holes_mode=false) : module(module), sigmap(module)
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{
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pool<SigBit> undriven_bits;
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pool<SigBit> unused_bits;
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@ -912,7 +911,7 @@ struct XAigerWriter
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Pass::call(holes_design, "clean -purge");
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std::stringstream a_buffer;
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XAigerWriter writer(holes_module, false /*zinit_mode*/, true /* holes_mode */);
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XAigerWriter writer(holes_module, true /* holes_mode */);
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writer.write_aiger(a_buffer, false /*ascii_mode*/);
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delete holes_design;
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@ -972,10 +971,10 @@ struct XAigerWriter
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if (output_bits.count(b)) {
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int o = ordered_outputs.at(b);
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int init = zinit_mode ? 0 : 2;
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int init = 0;
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auto it = init_map.find(b);
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if (it != init_map.end())
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init = it->second ? 1 : 0;
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if (it != init_map.end() && it->second)
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init = 1;
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output_lines[o] += stringf("output %d %d %s %d\n", o - GetSize(co_bits), i, log_id(wire), init);
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continue;
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}
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@ -1036,10 +1035,6 @@ struct XAigerBackend : public Backend {
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log(" -ascii\n");
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log(" write ASCII version of AIGER format\n");
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log("\n");
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log(" -zinit\n");
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log(" convert FFs to zero-initialized FFs, adding additional inputs for\n");
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log(" uninitialized FFs.\n");
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log("\n");
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log(" -map <filename>\n");
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log(" write an extra file with port and latch symbols\n");
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log("\n");
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@ -1050,7 +1045,6 @@ struct XAigerBackend : public Backend {
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void execute(std::ostream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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bool ascii_mode = false;
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bool zinit_mode = false;
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bool verbose_map = false;
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std::string map_filename;
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@ -1063,10 +1057,6 @@ struct XAigerBackend : public Backend {
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ascii_mode = true;
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continue;
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}
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if (args[argidx] == "-zinit") {
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zinit_mode = true;
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continue;
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}
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if (map_filename.empty() && args[argidx] == "-map" && argidx+1 < args.size()) {
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map_filename = args[++argidx];
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continue;
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@ -1085,7 +1075,7 @@ struct XAigerBackend : public Backend {
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if (top_module == nullptr)
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log_error("Can't find top module in current design!\n");
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XAigerWriter writer(top_module, zinit_mode);
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XAigerWriter writer(top_module);
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writer.write_aiger(*f, ascii_mode);
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if (!map_filename.empty()) {
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