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Fix copy-pasta typo

This commit is contained in:
Eddie Hung 2019-08-08 10:44:26 -07:00
parent 0492b8b541
commit 13cc106cf7
1 changed files with 2 additions and 2 deletions
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4
techlibs/xilinx/cells_sim.v
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@ -522,7 +522,7 @@ module DSP48E1 (
always @* Ar2 <= A_muxed;
end
// Configurable A register
// Configurable B register
if (BREG == 2) begin
always @(posedge CLK)
if (RSTB) begin
@ -532,7 +532,7 @@ module DSP48E1 (
if (CEB1) Br1 <= B_muxed;
if (CEB2) Br2 <= Br1;
end
end else if (AREG == 1) begin
end else if (BREG == 1) begin
always @(posedge CLK)
if (RSTB) begin
Br1 <= 18'b0;