From 677b8ed3ca70dad1dec288c274e64ebb0ef4011b Mon Sep 17 00:00:00 2001 From: David Shah Date: Thu, 18 Oct 2018 19:39:48 +0100 Subject: [PATCH 1/2] ecp5: Add latch inference Signed-off-by: David Shah --- techlibs/ecp5/Makefile.inc | 1 + techlibs/ecp5/latches_map.v | 11 +++++++++++ techlibs/ecp5/synth_ecp5.cc | 3 --- 3 files changed, 12 insertions(+), 3 deletions(-) create mode 100644 techlibs/ecp5/latches_map.v diff --git a/techlibs/ecp5/Makefile.inc b/techlibs/ecp5/Makefile.inc index f45859392..9b6f061bd 100644 --- a/techlibs/ecp5/Makefile.inc +++ b/techlibs/ecp5/Makefile.inc @@ -8,6 +8,7 @@ $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/dram.txt)) $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/brams_map.v)) $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram.txt)) $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/arith_map.v)) +$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/latches_map.v)) EXTRA_OBJS += techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk .SECONDARY: techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk diff --git a/techlibs/ecp5/latches_map.v b/techlibs/ecp5/latches_map.v new file mode 100644 index 000000000..c28f88cf7 --- /dev/null +++ b/techlibs/ecp5/latches_map.v @@ -0,0 +1,11 @@ +module \$_DLATCH_N_ (E, D, Q); + wire [1023:0] _TECHMAP_DO_ = "simplemap; opt"; + input E, D; + output Q = !E ? D : Q; +endmodule + +module \$_DLATCH_P_ (E, D, Q); + wire [1023:0] _TECHMAP_DO_ = "simplemap; opt"; + input E, D; + output Q = E ? D : Q; +endmodule diff --git a/techlibs/ecp5/synth_ecp5.cc b/techlibs/ecp5/synth_ecp5.cc index ab56a9444..cb6a4c3d8 100644 --- a/techlibs/ecp5/synth_ecp5.cc +++ b/techlibs/ecp5/synth_ecp5.cc @@ -266,10 +266,7 @@ struct SynthEcp5Pass : public ScriptPass if (abc2 || help_mode) { run("abc", " (only if -abc2)"); } - //TODO -#if 0 run("techmap -map +/ecp5/latches_map.v"); -#endif if (nomux) run("abc -lut 4"); else From d29b517fef05973dda3c556a95fbfb478d6e7e50 Mon Sep 17 00:00:00 2001 From: David Shah Date: Thu, 18 Oct 2018 19:40:02 +0100 Subject: [PATCH 2/2] ecp5: Sim model fixes Signed-off-by: David Shah --- techlibs/ecp5/cells_sim.v | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/techlibs/ecp5/cells_sim.v b/techlibs/ecp5/cells_sim.v index e43632c64..6e4b0a5ac 100644 --- a/techlibs/ecp5/cells_sim.v +++ b/techlibs/ecp5/cells_sim.v @@ -265,16 +265,18 @@ module TRELLIS_IO( output O ); parameter DIR = "INPUT"; + reg T_pd; + always @(*) if (T === 1'bz) T_pd <= 1'b0; else T_pd <= T; generate if (DIR == "INPUT") begin assign B = 1'bz; assign O = B; end else if (DIR == "OUTPUT") begin - assign B = T ? 1'bz : I; + assign B = T_pd ? 1'bz : I; assign O = 1'bx; - end else if (DIR == "INOUT") begin - assign B = T ? 1'bz : I; + end else if (DIR == "BIDIR") begin + assign B = T_pd ? 1'bz : I; assign O = B; end else begin ERROR_UNKNOWN_IO_MODE error();