mirror of https://github.com/YosysHQ/yosys.git
verific_import() changes to avoid ElaborateAll()
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@ -46,6 +46,7 @@ USING_YOSYS_NAMESPACE
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#include "VeriModule.h"
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#include "VeriWrite.h"
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#include "VhdlUnits.h"
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#include "HierTreeNode.h"
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#include "Message.h"
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#ifdef __clang__
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@ -1758,25 +1759,47 @@ void verific_import(Design *design, std::string top)
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std::set<Netlist*> nl_todo, nl_done;
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{
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VhdlLibrary *vhdl_lib = vhdl_file::GetLibrary("work", 1);
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VeriLibrary *veri_lib = veri_file::GetLibrary("work", 1);
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VhdlLibrary *vhdl_lib = vhdl_file::GetLibrary("work", 1);
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VeriLibrary *veri_lib = veri_file::GetLibrary("work", 1);
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Array *netlists = NULL;
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Array veri_libs, vhdl_libs;
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if (vhdl_lib) vhdl_libs.InsertLast(vhdl_lib);
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if (veri_lib) veri_libs.InsertLast(veri_lib);
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Array veri_libs, vhdl_libs;
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if (vhdl_lib) vhdl_libs.InsertLast(vhdl_lib);
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if (veri_lib) veri_libs.InsertLast(veri_lib);
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Array *netlists = hier_tree::ElaborateAll(&veri_libs, &vhdl_libs);
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Netlist *nl;
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int i;
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FOREACH_ARRAY_ITEM(netlists, i, nl) {
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if (top.empty() || nl->Owner()->Name() == top)
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nl_todo.insert(nl);
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}
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delete netlists;
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if (top.empty()) {
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netlists = hier_tree::ElaborateAll(&veri_libs, &vhdl_libs);
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}
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else {
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const Map *tree_tops = hier_tree::CreateHierarchicalTreeAll(&veri_libs, &vhdl_libs);
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HierTreeNode *node = tree_tops ? static_cast<HierTreeNode*>(tree_tops->GetValue(top.c_str())) : NULL;
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if (node) {
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Map specific_tops(STRING_HASH);
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specific_tops.Insert(top.c_str(), node);
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if (node->HasBindChild()) {
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MapIter mi;
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const char *key;
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FOREACH_MAP_ITEM(tree_tops, mi, &key, &node) {
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if (!node->IsPackage()) continue;
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specific_tops.Insert(key, node);
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}
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}
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netlists = hier_tree::GenerateNetlists(&specific_tops);
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}
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hier_tree::DeleteHierarchicalTree();
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veri_file::DeleteInstantiatedClassValues();
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}
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Netlist *nl;
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int i;
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FOREACH_ARRAY_ITEM(netlists, i, nl) {
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if (top.empty() || nl->Owner()->Name() == top)
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nl_todo.insert(nl);
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}
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delete netlists;
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if (!verific_error_msg.empty())
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log_error("%s\n", verific_error_msg.c_str());
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