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Merge pull request #818 from YosysHQ/clifford/dffsrfix 

Fix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_???_, fixes #816
This commit is contained in:
Clifford Wolf 2019-02-21 18:58:44 +01:00 committed by GitHub
parent 03aa3541ae 2da4c9c8f0
commit 0e371109b0
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 7 additions and 6 deletions
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13
passes/opt/opt_rmdff.cc
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@ -174,8 +174,6 @@ bool handle_dffsr(RTLIL::Module *mod, RTLIL::Cell *cell)
cell->unsetParam("\\CLR_POLARITY"); cell->unsetParam("\\CLR_POLARITY");
cell->unsetPort("\\SET"); cell->unsetPort("\\SET");
cell->unsetPort("\\CLR"); cell->unsetPort("\\CLR");
return true;
} }
else else
{ {
@ -186,11 +184,12 @@ bool handle_dffsr(RTLIL::Module *mod, RTLIL::Cell *cell)
cell->unsetParam("\\CLR_POLARITY"); cell->unsetParam("\\CLR_POLARITY");
cell->unsetPort("\\SET"); cell->unsetPort("\\SET");
cell->unsetPort("\\CLR"); cell->unsetPort("\\CLR");
return true;
} }
return true;
} }
else
if (!hasreset)
{ {
IdString new_type; IdString new_type;
@ -207,8 +206,10 @@ bool handle_dffsr(RTLIL::Module *mod, RTLIL::Cell *cell)
cell->unsetPort("\\S"); cell->unsetPort("\\S");
cell->unsetPort("\\R"); cell->unsetPort("\\R");
return did_something; return true;
} }
return did_something;
} }
bool handle_dlatch(RTLIL::Module *mod, RTLIL::Cell *dlatch) bool handle_dlatch(RTLIL::Module *mod, RTLIL::Cell *dlatch)