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Add -D DFF_MODE to abc9_map test

This commit is contained in:
Eddie Hung 2019-12-30 20:13:25 -08:00
parent 4c3f517425
commit 0c4be94a02
1 changed files with 4 additions and 4 deletions
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8
tests/arch/xilinx/abc9_map.ys
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@ -6,7 +6,7 @@ endmodule
EOT
design -save gold
techmap -map +/xilinx/abc9_map.v -max_iter 1
techmap -map +/xilinx/abc9_map.v -max_iter 1 -D DFF_MODE
techmap -map +/xilinx/abc9_unmap.v
select -assert-count 1 t:FDSE
select -assert-count 1 t:FDSE_1
@ -29,7 +29,7 @@ endmodule
EOT
design -save gold
techmap -map +/xilinx/abc9_map.v -max_iter 1
techmap -map +/xilinx/abc9_map.v -max_iter 1 -D DFF_MODE
techmap -map +/xilinx/abc9_unmap.v
select -assert-count 1 t:FDRE
select -assert-count 1 t:FDRE_1
@ -52,7 +52,7 @@ endmodule
EOT
design -save gold
techmap -map +/xilinx/abc9_map.v -max_iter 1
techmap -map +/xilinx/abc9_map.v -max_iter 1 -D DFF_MODE
techmap -map +/xilinx/abc9_unmap.v
select -assert-count 1 t:FDCE
select -assert-count 1 t:FDCE_1
@ -76,7 +76,7 @@ endmodule
EOT
design -save gold
techmap -map +/xilinx/abc9_map.v -max_iter 1
techmap -map +/xilinx/abc9_map.v -max_iter 1 -D DFF_MODE
techmap -map +/xilinx/abc9_unmap.v
select -assert-count 1 t:FDPE
techmap -autoproc -map +/xilinx/cells_sim.v