mirror of https://github.com/YosysHQ/yosys.git
Drive-by modernization in sat.cc
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
This commit is contained in:
parent
3c7122c378
commit
0bd70e8222
|
@ -256,13 +256,13 @@ struct SatHelper
|
||||||
{
|
{
|
||||||
RTLIL::SigSpec big_lhs, big_rhs;
|
RTLIL::SigSpec big_lhs, big_rhs;
|
||||||
|
|
||||||
for (auto &it : module->wires_)
|
for (auto wire : module->wires())
|
||||||
{
|
{
|
||||||
if (it.second->attributes.count(ID::init) == 0)
|
if (wire->attributes.count(ID::init) == 0)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
RTLIL::SigSpec lhs = sigmap(it.second);
|
RTLIL::SigSpec lhs = sigmap(wire);
|
||||||
RTLIL::SigSpec rhs = it.second->attributes.at(ID::init);
|
RTLIL::SigSpec rhs = wire->attributes.at(ID::init);
|
||||||
log_assert(lhs.size() == rhs.size());
|
log_assert(lhs.size() == rhs.size());
|
||||||
|
|
||||||
RTLIL::SigSpec removed_bits;
|
RTLIL::SigSpec removed_bits;
|
||||||
|
|
Loading…
Reference in New Issue