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abc9_ops: fix comment
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@ -1439,7 +1439,7 @@ void reintegrate(RTLIL::Module *module, bool dff_mode)
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// treated as being "free"), in particular driving primary
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// outputs (real primary outputs, or cells treated as blackboxes)
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// or driving box inputs.
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// Instead of just mapping those $_NOT_ gates into 2-input $lut-s
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// Instead of just mapping those $_NOT_ gates into 1-input $lut-s
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// at an area and delay cost, see if it is possible to push
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// this $_NOT_ into the driving LUT, or into all sink LUTs.
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// When this is not possible, (i.e. this signal drives two primary
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