riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Leftover printf

This commit is contained in:
Eddie Hung 2019-03-22 19:14:04 -07:00
parent 456295eb66
commit 0895093c7c
1 changed files with 0 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
passes/techmap/shregmap.cc
View File

@ -119,7 +119,6 @@ struct ShregmapTechXilinx7 : ShregmapTech
j = cell->getParam("\\S_WIDTH").as_int();
int k = 0;
for (auto bit : sigmap(cell->getPort("\\B"))) {
printf("%d\n", bit.offset);
sigbit_to_shiftx_offset[bit] = std::make_tuple(cell, j, k++);
if (k == width) {
k = 0;