mirror of https://github.com/YosysHQ/yosys.git
xilinx_srl now copes with word-level flops $dff{,e}
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@ -265,9 +265,8 @@ struct SynthXilinxPass : public ScriptPass
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if (widemux > 0 || help_mode)
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run("muxpack", " ('-widemux' only)");
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// shregmap -tech xilinx can cope with $shiftx and $mux
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// cells for identifying variable-length shift registers,
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// so attempt to convert $pmux-es to the former
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// xilinx_srl looks for $shiftx cells for identifying variable-length
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// shift registers, so attempt to convert $pmux-es to this
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// Also: wide multiplexer inference benefits from this too
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if (!(nosrl && widemux == 0) || help_mode) {
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run("pmux2shiftx", "(skip if '-nosrl' and '-widemux=0')");
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@ -349,12 +348,8 @@ struct SynthXilinxPass : public ScriptPass
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}
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run("opt -full");
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if (!nosrl || help_mode) {
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// shregmap operates on bit-level flops, not word-level,
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// so break those down here
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run("simplemap t:$dff t:$dffe", " (skip if '-nosrl')");
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if (!nosrl || help_mode)
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run("xilinx_srl -variable -minlen 3", "(skip if '-nosrl')");
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}
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std::string techmap_args = " -map +/techmap.v";
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if (help_mode)
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