From 06e5e18371bce001710b7c7183f481cabc405b24 Mon Sep 17 00:00:00 2001
From: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com>
Date: Thu, 16 May 2024 12:17:03 +1200
Subject: [PATCH] simlib.v: Autolink referenced cells in alu

---
 techlibs/common/simlib.v | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v
index 96f143c2a..6bcace498 100644
--- a/techlibs/common/simlib.v
+++ b/techlibs/common/simlib.v
@@ -626,8 +626,8 @@ endmodule
 //- A building block supporting both binary addition/subtraction operations, and
 //- indirectly, comparison operations.
 //- Typically created by the `alumacc` pass, which transforms:
-//- $add, $sub, $lt, $le, $ge, $gt, $eq, $eqx, $ne, $nex
-//- cells into this $alu cell.
+//- `$add`, `$sub`, `$lt`, `$le`, `$ge`, `$gt`, `$eq`, `$eqx`, `$ne`, `$nex`
+//- cells into this `$alu` cell.
 //-
 module \$alu (A, B, CI, BI, X, Y, CO);