mirror of https://github.com/YosysHQ/yosys.git
Merge remote-tracking branch 'origin/master' into xc7mux
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commit
06dcf7d08d
16
CHANGELOG
16
CHANGELOG
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@ -9,6 +9,17 @@ Yosys 0.9 .. Yosys 0.9-dev
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- Added "script -select"
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Yosys 0.9 .. Yosys 0.9-dev
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--------------------------
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* Various
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- Added "write_xaiger" backend
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- Added "abc9" pass for timing-aware techmapping (experimental, FPGA only, no FFs)
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- Added "synth_xilinx -abc9" (experimental)
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- Added "synth_ice40 -abc9" (experimental)
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- Added "synth -abc9" (experimental)
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Yosys 0.8 .. Yosys 0.8-dev
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--------------------------
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@ -32,11 +43,6 @@ Yosys 0.8 .. Yosys 0.8-dev
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- Added "synth_xilinx -nocarry"
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- Added "synth_xilinx -nowidelut"
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- Added "synth_ecp5 -nowidelut"
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- Added "write_xaiger" backend
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- Added "abc9" pass for timing-aware techmapping (experimental, FPGA only, no FFs)
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- Added "synth_xilinx -abc9" (experimental)
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- Added "synth_ice40 -abc9" (experimental)
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- Added "synth -abc9" (experimental)
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- "synth_xilinx" to now infer hard shift registers (-nosrl to disable)
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- "synth_xilinx" to now infer wide multiplexers (-widemux <min> to enable)
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- Fixed sign extension of unsized constants with 'bx and 'bz MSB
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