mirror of https://github.com/YosysHQ/yosys.git
Rename to XilinxDspPass
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2a1b98d478
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0597a3ea23
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@ -127,8 +127,8 @@ void pack_xilinx_dsp(xilinx_dsp_pm &pm)
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pm.blacklist(cell);
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}
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struct Ice40DspPass : public Pass {
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Ice40DspPass() : Pass("xilinx_dsp", "Xilinx: pack DSP registers") { }
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struct XilinxDspPass : public Pass {
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XilinxDspPass() : Pass("xilinx_dsp", "Xilinx: pack DSP registers") { }
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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@ -156,6 +156,6 @@ struct Ice40DspPass : public Pass {
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for (auto module : design->selected_modules())
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xilinx_dsp_pm(module, module->selected_cells()).run_xilinx_dsp(pack_xilinx_dsp);
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}
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} Ice40DspPass;
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} XilinxDspPass;
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PRIVATE_NAMESPACE_END
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